VIA Nano U3500
Published: (last update )
| Core | |
|---|---|
| Code name | Isaiah (CNB) |
| Base clock | 1000 MHz |
| Turbo full / half / single | - |
| Base multiplier | 5× |
| Technology | 65 nm |
| Transistors | - |
| Die size | 63 mm2 |
| Density | - |
| Cores / threads | 1 / 1 |
| Stepping | - |
| Cache | |
| L1 data cache | 64 kB |
| L1 inst. cache | 64 kB |
| L2 cache | 1024 kB |
| L2 cache type | On-die, full speed |
| L3 cache | - |
| L3 cache type | - |
| Instructions | |
|---|---|
| Basic inst. | x86, x87, MMX, SSE |
| Extended inst. | SSE2, (S)SSE3 |
| Extended inst. 2 | x86-64, SSE 4.1 |
| Extended inst. 3 | VT-x |
| Extended inst. 4 | |
| Extended inst. 5 | |
| The CPU | |
| Bus type | QDR, 800 MHz, 64 bit |
| Bus bandwith | 6 400 MB/s |
| Socket | Socket BGA400 |
| Package | NanoBGA2 |
| Package size | 21 × 21 mm |
| Manufacture date | - |
| Voltage | - |
| TDP | 5 W |
| Memory controller | - |
| Integrated VGA | - |
| Release date | 2009 |
