VIA C7 1 GHz
Published: (last update )
Core | |
---|---|
Code name | Esther (IBM) |
Base clock | 1000 MHz |
Turbo full / half / single | - |
Base multiplier | 10× |
Technology | 90 nm |
Transistors | 26.2 million |
Die size | 32 mm2 |
Density | 0.82 M / mm2 |
Cores / threads | 1 / 1 |
Stepping | - |
Cache | |
L1 data cache | 64 kB |
L1 inst. cache | 64 kB |
L2 cache | 128 kB |
L2 cache type | On-die, full speed |
L3 cache | - |
L3 cache type | - |
Instructions | |
---|---|
Basic inst. | x86, x87, MMX, SSE |
Extended inst. | SSE2, SSE3 |
Extended inst. 2 | |
Extended inst. 3 | |
Extended inst. 4 | |
Extended inst. 5 | |
The CPU | |
Bus type | QDR, 400 MHz, 64 bit |
Bus bandwith | 3 200 MB/s |
Socket | Socket BGA400 |
Package | NanoBGA2 |
Package size | 21 × 21 mm |
Manufacture date | 22nd week of 2007 |
Voltage | 1 V |
TDP | 9 W |
Memory controller | - |
Integrated VGA | - |
Release date | 2005 |