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VIA C7 1 GHz

Published: (last update )

Core
Code nameEsther (IBM)
Base clock1000 MHz
Turbo full / half / single-
Base multiplier10×
Technology90 nm
Transistors26.2 million
Die size32 mm2
Density0.82 M / mm2
Cores / threads1 / 1
Stepping-
Cache
L1 data cache64 kB
L1 inst. cache64 kB
L2 cache128 kB
L2 cache typeOn-die, full speed
L3 cache-
L3 cache type-
Instructions
Basic inst.x86, x87, MMX, SSE
Extended inst.SSE2, SSE3
Extended inst. 2
Extended inst. 3
Extended inst. 4
Extended inst. 5
The CPU
Bus typeQDR, 400 MHz, 64 bit
Bus bandwith3 200 MB/s
SocketSocket BGA400
PackageNanoBGA2
Package size21 × 21 mm
Manufacture date22nd week of 2007
Voltage1 V
TDP9 W
Memory controller-
Integrated VGA-
Release date2005
VIA C7 1 GHz (front side)

VIA C7 1 GHz (front side)

VIA C7 1 GHz (back side)

VIA C7 1 GHz (back side)