Hardware museum

Over 20 years of PC history

Logo

Cyrix MII-333GP

Published: (last update )

Core
Code nameMII
Base clock250 MHz
Turbo full / half / single-
Base multiplier
Technology250 nm
Transistors6.5 milion
Die size88 mm2
Cores / threads1 / 1
Stepping-
Cache
L1 data cache64 kB
L1 inst. cache-
L2 cache-
L2 cache typeExternal, 75 MHz
L3 cache-
L3 cache type-
Instructions
Basic inst.x86, x87, MMX
Extended inst.
Extended inst. 2
Extended inst. 3
Extended inst. 4
The CPU
Bus typeSDR, 75 MHz, 64 bit
Bus bandwith600 MB/s
SocketSocket 7
Package296 pin Ceramic PGA
Package size50 x 50 mm
Manufacture date-
Voltage2.9 V
TDP23 W
Memory controller-
Integrated VGA-
Release date1998
Cyrix MII-333GP (front side)

Cyrix MII-333GP (front side)

Cyrix MII-333GP (back side)

Cyrix MII-333GP (back side)