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Cyrix MediaGX-133

Published: (last update )

Core
Code nameMediaGX (Cyrix, 350 nm)
Base clock133 MHz
Turbo full / half / single-
Base multiplier
Technology350 nm
Transistors2.4 million
Die size-
Density-
Cores / threads1 / 1
Stepping-
Cache
L1 data cache16 kB
L1 inst. cache-
L2 cache-
L2 cache typeExternal, 33 MHz
L3 cache-
L3 cache type-
Instructions
Basic inst.x86, x87
Extended inst.
Extended inst. 2
Extended inst. 3
Extended inst. 4
Extended inst. 5
The CPU
Bus typeSDR, 33 MHz, 32 bit
Bus bandwith132 MB/s
SocketSocket BGA-352
Package352 ball BGA
Package size35 x 35 mm
Manufacture date11th week of 1997
Voltage3.3 V
TDP-
Memory controller-
Integrated VGA-
Release date1997
Cyrix MediaGX-133 (front side)

Cyrix MediaGX-133 (front side)

Cyrix MediaGX-133 (back side)

Cyrix MediaGX-133 (back side)