Hardware Museum

Over 20 years of PC history

Logo

AMD Turion II P520

Published: (last update )

Core
Code nameChamplain (2C)
Base clock2300 MHz
Turbo full / half / single-
Base multiplier11.5×
Technology45 nm
Transistors234 million
Die size118 mm2
Cores / threads2 / 2
SteppingDA-C3
Cache
L1 data cache2 × 64 kB
L1 inst. cache2 × 64 kB
L2 cache2 × 1024 kB
L2 cache typeOn-die, full speed
L3 cache-
L3 cache type-
Instructions
Basic inst.x86, x87, MMX(+), SSE
Extended inst.3DNow!, SSE2, SSE3
Extended inst. 2x86-64, SSE4a
Extended inst. 3AMD-V
Extended inst. 4
The CPU
Bus typeHT, 3600 MHz, 32 bit
Bus bandwith14400 MB/s
SocketSocket S1 (S1g4)
Package638 pin lidless organic micro PGA
Package size35 x 35 mm
Manufacture date29th week of 2010
Voltage1.1 V
TDP25 W
Memory controllerDDR3 1066, 128 bit
Integrated VGA-
Release date2010
AMD Turion II P520 (front side)

AMD Turion II P520 (front side)

AMD Turion II P520 (back side)

AMD Turion II P520 (back side)