AMD Ryzen 5 2600
Published: (last update )
Note: The Pinnacle Ridge die contains two CCX - 4C/8T and 8 MB L3 cache each. Ryzen 5 2600 has 3 cores enabled per CCX. SMT is active.
Core | |
---|---|
Code name | Pinnacle Ridge |
Base clock | 3400 MHz |
Turbo full / half / single | 3900 | 3900 | 3900 MHz |
Base multiplier | 34× |
Technology | 12 nm |
Transistors | 4800 million |
Die size | 213 mm2 |
Density | 22.5 M / mm2 |
Cores / threads | 6 / 12 |
Stepping | PiR-B2 |
Cache | |
L1 data cache | 6 × 32 kB |
L1 inst. cache | 6 × 64 kB |
L2 cache | 6 × 512 kB |
L2 cache type | On-die, full speed |
L3 cache | 2 × 8192 kB |
L3 cache type | On-die, full speed |
Instructions | |
---|---|
Basic inst. | x86, x87, MMX(+), SSE |
Extended inst. | SSE2, (S)SSE3 |
Extended inst. 2 | x86-64, SSE(4.1, 4.2, 4a) |
Extended inst. 3 | AMD-V, AES-NI, AVX |
Extended inst. 4 | AVX2, FMA3 |
Extended inst. 5 | |
The CPU | |
Bus type | UMI, 100 MHz |
Bus bandwith | - |
Socket | Socket AM4 |
Package | 1331 pin lidded micro PGA |
Package size | 40 x 40 mm |
Manufacture date | 36th week of 2018 |
Voltage | - |
TDP | 65 W |
Memory controller | DDR4 2933, 128 bit |
Integrated VGA | - |
Release date | 2018 |