AMD Phenom II X4 960T BE
Published: (last update )
Note: Chip harvests from Thuban with two cores disabled. Sometimes it is possible to unlock them.
| Core | |
|---|---|
| Code name | Zosma |
| Base clock | 3000 MHz |
| Turbo full / half / single | 3000 | 3400 | 3400 MHz |
| Base multiplier | 15× |
| Technology | 45 nm |
| Transistors | 904 million |
| Die size | 346 mm2 |
| Density | 2.61 M / mm2 |
| Cores / threads | 4 / 4 |
| Stepping | PH-E0 |
| Cache | |
| L1 data cache | 4 × 64 kB |
| L1 inst. cache | 4 × 64 kB |
| L2 cache | 4 × 512 kB |
| L2 cache type | On-die, full speed |
| L3 cache | 6144 kB |
| L3 cache type | On-die, 2000 MHz |
| Instructions | |
|---|---|
| Basic inst. | x86, x87, MMX(+), SSE |
| Extended inst. | 3DNow!, SSE2, SSE3 |
| Extended inst. 2 | x86-64, SSE4a |
| Extended inst. 3 | AMD-V |
| Extended inst. 4 | |
| Extended inst. 5 | |
| The CPU | |
| Bus type | HT, 4000 MHz, 32 bit |
| Bus bandwith | 16 000 MB/s |
| Socket | Socket AM3 |
| Package | 938 pin micro OPGA |
| Package size | 40 x 40 mm |
| Manufacture date | 52nd week of 2011 |
| Voltage | - |
| TDP | 95 W |
| Memory controller | DDR2 1066 / DDR3 1600, 128 bit |
| Integrated VGA | - |
| Release date | 2010 |
