Intel Core i7 Auburndale 1.87 GHz (ES)
Published: (last update )
Note: The MCM package contains 45 nm CPU die and 45 nm NB+IGP die (114 mm², 177 million transistors). Auburndale never got past the ES stage.
| Core | |
|---|---|
| Code name | Auburndale |
| Base clock | 1866 MHz |
| Turbo full / half / single | - |
| Base multiplier | 14× |
| Technology | 45 nm |
| Transistors | - |
| Die size | - |
| Density | - |
| Cores / threads | 2 / 4 |
| Stepping | - |
| Cache | |
| L1 data cache | 2 × 32 kB |
| L1 inst. cache | 2 × 32 kB |
| L2 cache | 2 × 256 kB |
| L2 cache type | On-die, full speed |
| L3 cache | 4096 kB |
| L3 cache type | On-die, unknown speed |
| Instructions | |
|---|---|
| Basic inst. | x86, x87, MMX, SSE |
| Extended inst. | SSE2, (S)SSE3 |
| Extended inst. 2 | EM64T, SSE(4.1, 4.2) |
| Extended inst. 3 | VT-x |
| Extended inst. 4 | |
| Extended inst. 5 | |
| The CPU | |
| Bus type | DMI, 133 MHz |
| Bus bandwith | - |
| Socket | Socket G1 |
| Package | 988 pin Micro FCPGA |
| Package size | 37.5 x 37.5 mm |
| Manufacture date | 5th week of 2009 |
| Voltage | - |
| TDP | - |
| Memory controller | DDR3 1066, 128 bit |
| Integrated VGA | HD Graphics (Gen 5) |
| Release date | 2009 |
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