Intel 486 DX4-100
Published: (last update )
Note: 16 KB 4-way set associative unified code and data L1 cache.
| Core | |
|---|---|
| Code name | P24C |
| Base clock | 100 MHz |
| Turbo full / half / single | - |
| Base multiplier | 3× |
| Technology | 600 nm |
| Transistors | 1.6 million |
| Die size | 87 mm2 |
| Density | 0.018 M / mm2 |
| Cores / threads | 1 / 1 |
| Stepping | - |
| Cache | |
| L1 data cache | 16 kB |
| L1 inst. cache | - |
| L2 cache | - |
| L2 cache type | - |
| L3 cache | - |
| L3 cache type | - |
| Instructions | |
|---|---|
| Basic inst. | x86, x87 |
| Extended inst. | |
| Extended inst. 2 | |
| Extended inst. 3 | |
| Extended inst. 4 | |
| Extended inst. 5 | |
| The CPU | |
| Bus type | SDR, 33 MHz, 32 bit |
| Bus bandwith | 132 MB/s |
| Socket | Socket unknown |
| Package | SQFP-208 |
| Package size | 30.6 x 30.6 mm |
| Manufacture date | 6th week of 1998 |
| Voltage | 3.3 V |
| TDP | 3.6 W |
| Memory controller | - |
| Integrated VGA | - |
| Release date | 1994 |
