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Intel 486 DX4-100

Published: (last update )

Note: 16 KB 4-way set associative unified code and data L1 cache.

Core
Code nameP24C
Base clock100 MHz
Turbo full / half / single-
Base multiplier
Technology600 nm
Transistors1.6 million
Die size87 mm2
Cores / threads1 / 1
Stepping-
Cache
L1 data cache16 kB
L1 inst. cache-
L2 cache-
L2 cache type-
L3 cache-
L3 cache type-
Instructions
Basic inst.x86, x87
Extended inst.
Extended inst. 2
Extended inst. 3
Extended inst. 4
The CPU
Bus typeSDR, 33 MHz, 32 bit
Bus bandwith132 MB/s
SocketSocket unknown
PackageSQFP-208
Package size30.6 x 30.6 mm
Manufacture date6th week of 1998
Voltage3.3 V
TDP3.6 W
Memory controller-
Integrated VGA-
Release date1994
Intel 486 DX4-100 (front side)

Intel 486 DX4-100 (front side)

Intel 486 DX4-100 (back side)

Intel 486 DX4-100 (back side)