Intel Pentium and Pentium MMX
Intel introduced the first Pentium at the beginning of 1993. For that time it was very advanced and complex processor - the first one featuring superscalar architecture. The first Pentium had transistor count of 3.1 million, was manufactured using 800nm technology with a die size od 294 mm2. To compare it to the common CPU of the time - 486DX2 was made using the same 800nm process, but took only 81 mm2 and 1.2 million transistors. Pentium existed in two variants - 60 and 66 MHz. Some of the early ones suffered from the famous FDIV bug, which caused errors in some calculations. Interesting fact is the Socket 4 Pentium was the last processor without multiplier - core speed and bus speed was the same.
One year later improved Pentium P54C was launched. It was produced on new 600nm process, this allowed Intel to lower voltage to 3.3V and decrease die size to almost half. 75, 90, 100 and 120 MHz models existed. Later the manufacturing technology was improved once again and the final revision of Pentium emerged - P54CS. On 350nm technology die size decreased to 83 mm2, which significantly reduced heat dissipation and manufacturing cost. The first P54CS model started at 133 MHz in mid-1995, later 150, 166 and 200 MHz variants were sold. 200 MHz Pentium was the last classic P54-based Pentium. All P54C Pentiums used 296-pin socket 5 and P54CS used socket 7. Socket 5 CPUs could be used in socket 7 boards and vice versa, however older socket 5 boards might not support higher multipliers.
Pentium MMX (code name P55C) became the last evolution of the P5 architecture. There were several improvements compared to the P54CS. The first one was doubled L1 cache - 16 kB data + 16 kB instruction cache. P55C also featured new MMX instruction set to improve performance in multimedia applications. Pentium MMX was the first processor to use split rail voltage - the core used 2.8V and I/O part remained at 3.3V. 166 and 200 MHz variants were introduced in January 1997, 233 MHz Pentium MMX appeared in mid-1997 and it was the last Intel socket 7 CPU.
Intel Pentium Pro, Pentium II, Pentium III, Celeron (P6 architecture)
Pentium Pro was developed for server and workstation use. Compared to classic Pentium, the design was completely different. Pentium Pro supported Out-of-Order instruction execution, 36-bit memory addressing (PAE) and also cache was greatly improved. Classic Pentium supported 2-way SMP, Pentium Pro was ready for 4-way SMP and with special boards even 8-way.
At the time it wasn't possible to make CPU with large L2 cache as one silicon die. 486 and Pentium utilized external cache located on the motherboard running at FSB speed (usually 50 - 66 MHz for Pentium and 33 - 40 for 486). This solution was inadequate for performance level of Pentium Pro. So, Intel was forced to use MCM design - CPU core as one silicon die and L2 cache as a second. Both of them were located in single ceramic package (Dual Cavity PGA). With this approach the cache ran at full speed. The main disadvantage of this concept was high price, low yields and high power consumption. Still, for top hi-end product it was acceptable.
|Manufacturing technology||Die size||Transistor count|
|150 MHz / 256 kB||500 nm||500 nm||306 mm2||203 mm2||5.5 M||15.5 M|
|166 MHz / 512 kB||350 nm||350 nm||195 mm2||242 mm2||5.5 M||31 M|
|180 MHz / 256 kB||350 nm||500 nm||195 mm2||203 mm2||5.5 M||15.5 M|
|200 MHz / 256 kB||350 nm||500 nm||195 mm2||203 mm2||5.5 M||15.5 M|
|200 MHz / 512 kB||350 nm||350 nm||195 mm2||242 mm2||5.5 M||31 M|
|200 MHz / 1024 kB||350 nm||350 nm||195 mm2||484 mm2||5.5 M||62 M|
Most Pentium Pro models were introduced in November 1995. Later in the end of 1997 Intel launched the fastest and last Pentium Pro. It operated at 200 MHz just like older variants, but featured 1 MB of L2 cache. The cache consisted of two 512 kB SRAM dies. Because of this new configuration Intel had to use new package - plastic with aluminum heat spreader. The original ceramic package was designed to use CPU die and cache die, the new 1 MB Pentium Pro however required three silicon dies in total (1x CPU + 2x cache). In 1997 it was record-breaking processor in all aspects. The most impressive was transistor count at 67.5 million. It took another 6 years for regular desktop to beat this (Athlon 64 FX - 105 million transistors, year 2003). Also the total die size of 679 mm2 was extreme for the time and matches the biggest today server processors like Nehalem-EX or Haswell-EP (these are monolithic however).
A year after Pentium MMX, the P6 architecture got into desktop mainstream computers. In early May 1997 the Pentium II was introduced. Three variants existed - 233, 266 and 300 MHz. All of them based on 350 nm Klamath core. There were several changes compared to Pentium Pro - doubled L1 cache 8 + 8 kB to 16 + 16 kB, improved 16-bit code execution and addition of MMX instruction set. Full speed L2 cache was too expensive to be used on mainstream CPU, so Pentium II came up with 512 kB of external cache running at half of the CPU speed. This cache design also required new package for the processor. Slot 1 package consisted of small PCB with soldered CPU (BGA), L2 cache (QFP), and several other ICs, all of it enclosed in plastic case with aluminum heat spreader. On top of the heat spreader either passive or active heatsink was mounted.
First Pentium II processors were rather power hungry and especially the 300 MHz variant had cooling difficulties. It didn't take long for Intel to present a 250 nm die shrink code named Deschutes. Deschutes had the same transistor count of 7.5 million (CPU only) and a die size of 118 mm2 (opposed to 203 mm2 of original PII Klamath). Thanks to the more advanced technology, voltage was reduced from 2.8V to 2V, also heat dissipation was much lower. New Pentium II started at 266 MHz and topped at 450 MHz. Later PII also used cheaper SECC-2 package without heat spreader, the heatsink was mounted directly to the CPU die.
In January 1999 PII successor was ready for market. Intel simply named it Pentium III. At first 450 and 500 MHz variants were introduced and till the later also 550, 600, 533B and 600B models. B-marked PIII utilized faster 133 MHz FSB to offer better performance, hovewer it also meant not very popular i820 chipset with RDRAM memory had to be used. At the time it was the oly chipset to officially support FSB 133 without overclocking. Compared to Pentium II Deschutes Pentium III Katmai improvements werent very significant. Other than addition of SSE instruction set, rest of the CPU remained more or less the same. Transistor count grew by 2 milion transistor and die size increased to 132 mm2. L2 cache type didn't change. PIII were made almost exclusively in SECC-2 package.
PIII Katmai was succeeded quite early by another Pentium III iteration - Coppermine. As external cache started to limit the performance and advanced manufacturing technology allowed Intel to put much more transistors to single silicon die, Coppermine dropped the external cache concept. Now 256 kB of on-die full-speed cache was used, just like AMD did with K6-III few months before. New 180 nm technology allowed frequency to reach 800 MHz before the end of 1999 and at the same time reduced power consumption to half. As Coppermine once again was a single-chip solution, Intel made the new PIII also in PGA 370 package. Socket 370 was already on the market - cheaper Celeron processors used it. Due to lower voltage, Coppermine didn't fit older motherboards, at least not without some modifications. Slot 1 version of PIII Coppermine was also available.
|Socket 8 / 370, Slot 1 chipsets|
|Chipset||SMP||RAM type||Max. FSB||Max. RAM||PCI||AGP|
|Intel 450KX||yes||FPM||66 MHz||1024 MB||2.0||no|
|Intel 440FX||yes||EDO||66 MHz||1024 MB||2.1||no|
|Intel 440LX||yes||EDO, SDR||66 MHz||1024 / 512 MB||2.1||2×|
|Intel 440BX||yes||EDO, SDR||75 MHz||1024 MB||2.1||2×|
|Intel 820||yes||RDRAM||100 MHz||1024 MB||2.2||4×|
|VIA Apollo Pro||no||EDO, SDR||133 MHz||1024 MB||2.1||2×|
|VIA Apollo Pro 133||no||EDO, SDR||133 MHz||1536 MB||2.1||2×|
|VIA Apollo Pro 133A||yes||SDR||133 MHz||2048 MB||2.1||4×|
After Pentium II introduction, the lower segment was still occupied by socket 7 with Pentium and Pentium MMX processors. With increasing clock speed of PII the performance gap became larger. To keep this market, Intel created low-cost version of Pentium II called Celeron. Celeron was very similar to PII Deschutes, but in order to make it cheaper, the L2 cache was removed completely. Only two models of first Celeron (codename Covington) were introduced - 266 and 300 MHz, both in slot 1 package. Absence of L2 cache lowered performance too much to remain competitive. Also slot 1 motherboards weren't cheap.
Intel was well aware of these shortcomings and quickly developed second generation Celeron to address these issues. Mendocino launched in second half of 1998 along with new socket 370 platform. Architecture-wise Mendocino was identical to PII but Inter used full-speed on-die cache for the first time. Even with just 128 kB the performance was very close to similarly clocked (and much more expensive) PII. Celeron Mendocino started at 300 MHz and the fastest model reached 533 MHz in early 2000. 433 MHz was the last type available in both slot 1 and socket 370 package, faster Celerons were only in PGA 370. Back in the day Celerons were very popular.